FPGA Based Digital World - MCU SoC

MCU SoC – ARM and RISC-V

ARM ISA(RISC)

ARM ISA are popular these days, and it originates from ARM Holdings (http://www.arm.com/, https://developer.arm.com/docs) who provides ARM architecture or processor IP, but provides no ARM chips.

Three architecture profiles are provided for ARM.

- A(Applications): for complex computing

Armv7-A: supports the Arm (A32) and Thumb (T32) instructions

Armv8-A: supports A64 instruction set

- R(Real-Time): for high performance, hard real-time

Armv7-R/Armv8-R: similar to A

- M(Microcontroller): for smaller/lower power consumption

Armv6-M/Armv7-M/ Armv8-M: T32 instruction

RISC-V ISA

RISC –V ISA is free and open ISA (https://riscv.org/risc-v-isa/), and originated from UC Berkley, 2010.

The ISA is flexible and is divided into below parts:

- Base integer ISA: provide minimal set of instructions, 32bit, 64bit or 128bit address

- Optional extensions to base ISA

The register bit size of the instruction is also flexible based on the ISA instruction type.

- Base ISA: 32(I)/16(E) * 32bit/64bit

- F/D ISA: + 32*float registers

And the main features of RISC-V is (https://www.eet-china.com/news/201908201433.html)

（1）简洁：较其他商用指令集小很多。

（2）全新设计：吸取了前辈的经验教训，用户和特权指令集明确分离，和微架构/工艺技术脱钩。

（3）模块化ISA：提供短小精干的基本指令集+标准扩展（1+N），为将来预留足够空间。

（4）稳定性：基本及标准扩展ISA不会再改变，通过可选扩展而非更新ISA的方式来增加指令。

（5）通过社区进行设计：由行业或学术专家及软件开发者组成的社区进行设计，可以共享RISC-V软件生态系统。


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